Four by Four Matrix Mixer

minione · 28 May 2007

i have the same thin, but its 9x9 and its coded, i can share it if whatever, this kinda of mixer is very good for fm mtrxes

oddson · 28 May 2007

I can code a mixer... I just need to know how take a value from streamA and mix it with streamB. Normally the streams stay independent.

minione · 31 May 2007

sorr, my english is not so good that i can understand all at once, especially when i got blown )))

AngularMomentum · 1 Jun 2007

minione wrote: i have the same thin, but its 9x9 and its coded, i can share it if whatever, this kinda of mixer is very good for fm mtrxes

I would like to make use of that, please.

oddson · 1 Jun 2007

minione wrote: ...especially when i got blown...

No sexually explicit content allowed here! blow= (v) fellate, suck, blow, go down on (provide sexual gratification through oral stimulation)

Can you post the code for your mixer?

minione · 1 Jun 2007

ill post it this evening sorry for my language i meand blow like smoke )) in my country word blow means smoke but only not for sigarets)

infuzion · 1 Jun 2007

AMD has an optimized multiply routine, doc 40546.pdf (Software Optimization Guide for AMD Family 10h Processors) page 162. But it requires opcodes not opened in SM yet. 4 X 4 Matrix Multiplication (SSE) ; matrix_x_vector_sse(float *trR, float *v, int num_vertices_to_rotate, float *rotv); ; ; TO ASSEMBLE INTO *.obj DO THE FOLLOWING: ; ml.exe -coff -c matrix_x_vector_sse.asm ; .586 .K3D .XMM _TEXT SEGMENT PUBLIC _matrix_x_vector_sse _matrix_x_vector_sse PROC NEAR ;============================================================================== ; INSTRUCTIONS BELOW SAVE THE REGISTER STATE WITH WHICH THIS ROUTINE WAS ; ENTERED. ; REGISTERS EAX, ECX, AND EDX ARE CONSIDERED VOLATILE AND ASSUMED TO BE CHANGED, ; WHILE THE REGISTERS BELOW MUST BE PRESERVED IF THE USER IS CHANGING THEM push ebp mov ebp, esp ;============================================================================== ; Parameters passed into routine: ; [ebp+8] = ->trR ; [ebp+12] = ->v ; [ebp+16] = num_vertices_to_rotate ; [ebp+20] = ->rotv ;============================================================================== push ebx push esi push edi ;============================================================================== ; THE 4 ASM LINES BELOW LOAD THE FUNCTION's ARGUMENTS INTO GENERAL-PURPOSE ; REGISTERS (GPRS) ; esi = address of Transposed Rotation Matrix ; edi = address of vertices to rotate ; ecx = # of vertices to rotate ; eax = address of rotated vertices ;============================================================================== mov esi, [ebp+8] ; ESI = ->trR mov edi, [ebp+12] ; EDI = ->v mov ecx, [ebp+16] ; ECX = num_vertices_to_rotate mov edx, ecx ; EDX = num_vertices_to_rotate shl edx, 4 ; EDX = 16*num_vertices_to_rotate mov eax, [ebp+20] ; EAX = ->rotv imul ecx, 2 ; ECX = # quadwords of vertices to rotate add edi, edx ; EDI = -> end of "v" add eax, edx ; EAX = -> end of "rotv" neg ecx ; ECX = -# quadwords of vertices to rotate ;============================================================================== Chapter 9Optimizing with SIMD Instructions 163

Software Optimization Guide for AMD Family 10h Processors 40546 Rev. 3.02 May 2007 ; THE 4 ASM LINES BELOW LOAD THE TRANSPOSED ROTATION MATRIX "R" INTO XMM0-XMM3 ; IN THE FOLLOWING MANNER: ; xmm0 = column 0 of "R" or row 0 of "R" transpose ; xmm1 = column 1 of "R" or row 1 of "R" transpose ; xmm2 = column 2 of "R" or row 2 of "R" transpose ; xmm3 = column 3 of "R" or row 3 of "R" transpose ;============================================================================== movaps xmm0, [esi] ; XMM0 = [R30,R20,R10,R00] movaps xmm1, [esi+16] ; XMM1 = [R31,R21,R11,R01] movaps xmm2, [esi+32] ; XMM2 = [R32,R22,R12,R02] movaps xmm3, [esi+48] ; XMM3 = [R33,R23,R13,R03] ;============================================================================== ; THIS LOOP ROTATES "num_vertices_to_rotate" VERTICES BY THE TRANSPOSED ; ROTATION MATRIX "R" PASSED INTO THE ROUTINE AND STORES THE ROTATED ; VERTICES TO "rotv". ;============================================================================== ALIGN 32 ; Align address of loop to a 32-byte boundary. rotate_vertices_loop: movlps xmm4, [edi+8*ecx] ; XMM4=[,,v1,v0] movlps xmm6, [edi+8*ecx+8] ; XMM6=[,,v3,v2] unpcklps xmm4, xmm4 ; XMM4=[v1,v1,v0,v0] unpcklps xmm6, xmm6 ; XMM6=[v3,v3,v2,v2] movhlps xmm5, xmm4 ; XMM5=[,,v1,v1] movhlps xmm7, xmm6 ; XMM7=[,,v3,v3] movlhps xmm4, xmm4 ; XMM4=[v0,v0,v0,v0] mulps xmm4, xmm0 ; XMM4=[R30*v0,R20*v0,R10*v0,R00*v0] movlhps xmm5, xmm5 ; XMM5=[v1,v1,v1,v1] mulps xmm5, xmm1 ; XMM5=[R31*v1,R21*v1,R11*v1,R01*v1] movlhps xmm6, xmm6 ; XMM6=[v2,v2,v2,v2] mulps xmm6, xmm2 ; XMM6=[R32*v2,R22*v2,R12*v2,R02*v2] addps xmm4, xmm5 ; XMM4=[R30*v0+R31*v1,R20*v0+R21*v1, ; R10*v0+R11*v1,R00*v0+R01*v1] movlhps xmm7, xmm7 ; XMM7=[v3,v3,v3,v3] mulps xmm7, xmm3 ; XMM6=[R33*v3,R23*v3,R13*v3,R03*v3] addps xmm6, xmm7 ; XMM6=[R32*v2+R33*v3,R22*v2+R23*v3, ; R12*v2+R13*v3,R02*v2+R03*v3] addps xmm4, xmm6 ; XMM4=New rotated vertex movntps [eax+8*ecx], xmm4 ; Store rotated vertex to rotv. add ecx, 2 ; Decrement the # of QWORDs to rotate by 2. jnz rotate_vertices_loop sfence ; Finish all memory writes. ;============================================================================== ; INSTRUCTIONS BELOW RESTORE THE REGISTER STATE WITH WHICH THIS ROUTINE ; WAS ENTERED ; REGISTERS EAX, ECX, EDX ARE CONSIDERED VOLATILE AND ASSUMED TO BE CHANGED ; WHILE THE REGISTERS BELOW MUST BE PRESERVED IF THE USER IS CHANGING THEM pop edi pop esi pop ebx mov esp, ebp pop ebp ;============================================================================== ret _matrix_x_vector_sse ENDP _TEXT ENDS END

BasherT · 1 Jun 2007

Wow. This thread has sex and drugs, but where's the rock 'n roll??

minione · 1 Jun 2007

it will be in the evening when i get back to the computer

minione · 2 Jun 2007

hey peopl. sorry for my late, i was not in condition yesterday to find anything in my hdd))))) here is 9x9 matrix mixer (or fm). streamin i1o1;streamin i1o5;streamin i1o9; streamin i1o2;streamin i1o6; streamin i1o3;streamin i1o7; streamin i1o4;streamin i1o8; streamin i2o1;streamin i2o5;streamin i2o9; streamin i2o2;streamin i2o6; streamin i2o3;streamin i2o7; streamin i2o4;streamin i2o8; streamin i3o1;streamin i3o5;streamin i3o9; streamin i3o2;streamin i3o6; streamin i3o3;streamin i3o7; streamin i3o4;streamin i3o8; streamin i4o1;streamin i4o5;streamin i4o9; streamin i4o2;streamin i4o6; streamin i4o3;streamin i4o7; streamin i4o4;streamin i4o8; streamin i5o1;streamin i5o5;streamin i5o9; streamin i5o2;streamin i5o6; streamin i5o3;streamin i5o7; streamin i5o4;streamin i5o8; streamin i6o1;streamin i6o5;streamin i6o9; streamin i6o2;streamin i6o6; streamin i6o3;streamin i6o7; streamin i6o4;streamin i6o8; streamin i7o1;streamin i7o5;streamin i7o9; streamin i7o2;streamin i7o6; streamin i7o3;streamin i7o7; streamin i7o4;streamin i7o8; streamin i8o1;streamin i8o5;streamin i8o9; streamin i8o2;streamin i8o6; streamin i8o3;streamin i8o7; streamin i8o4;streamin i8o8; streamin i9o1;streamin i9o5;streamin i9o9; streamin i9o2;streamin i9o6; streamin i9o3;streamin i9o7; streamin i9o4;streamin i9o8; streamin i1; streamin i2; streamin i3; streamini4; streamini5; streamini6; streamini7; streamini8; streamini9; streamout o1; streamout o2; streamout o3; streamout o4; streamout o5; streamout o6; streamout o7; streamout o8; streamouto9;

o1 = i1*(i1o1)+i2*(i2o1)+i3*(i3o1)+i4*(i4o1) +i5*(i5o1)+i6*(i6o1)+i7*(i7o1)+i8*(i8o1)+i9*(i9o1); o2 = i1*(i1o2)+i2*(i2o2)+i3*(i3o2)+i4*(i4o2) +i5*(i5o2)+i6*(i6o2)+i7*(i7o2)+i8*(i8o2)+i9*(i9o2); o3 = i1*(i1o3)+i2*(i2o3)+i3*(i3o3)+i4*(i4o3) +i5*(i5o3)+i6*(i6o3)+i7*(i7o3)+i8*(i8o3)+i9*(i9o3); o4 = i1*(i1o4)+i2*(i2o4)+i3*(i3o4)+i4*(i4o4) +i5*(i5o4)+i6*(i6o4)+i7*(i7o4)+i8*(i8o4)+i9*(i9o4); o5 = i1*(i1o5)+i2*(i2o5)+i3*(i3o5)+i4*(i4o5) +i5*(i5o5)+i6*(i6o5)+i7*(i7o5)+i8*(i8o5)+i9*(i9o5); o6 = i1*(i1o6)+i2*(i2o6)+i3*(i3o6)+i4*(i4o6) +i5*(i5o6)+i6*(i6o6)+i7*(i7o6)+i8*(i8o6)+i9*(i9o6); o7 = i1*(i1o7)+i2*(i2o7)+i3*(i3o7)+i4*(i4o7) +i5*(i5o7)+i6*(i6o7)+i7*(i7o7)+i8*(i8o7)+i9*(i9o7); o8 = i1*(i1o8)+i2*(i2o8)+i3*(i3o8)+i4*(i4o8) +i5*(i5o8)+i6*(i6o8)+i7*(i7o8)+i8*(i8o8)+i9*(i9o8); o9 = i1*(i1o9)+i2*(i2o9)+i3*(i3o9)+i4*(i4o9) +i5*(i5o9)+i6*(i6o9)+i7*(i7o9)+i8*(i8o9)+i9*(i9o9);

i dont know why i coded there symbols "()" but who cares! n--joy!

infuzion · 3 Jun 2007

Have you tested it out? I'm suspecting there are too many calculations per line.

minione · 3 Jun 2007

i dont remember, but i think its must be workin', i saw it in asm yesterday and there are was only xmm0 and xmm1 slots i think its not so bad, Dave

minione · 3 Jun 2007

hmmm. here i v thought that if at the output there are all inputs that will be signal to loud.... what if add som multiplier " outR=outR*(1-(1/(N-1))*in1outR-....-(1/(N-1))*inNoutR)" (where N number of inputs/outputs and R is a number of current output)?. but it will be too much..?. and how to control the calculation result than? but for odddson's 4x4 it will be good

minione · 5 Jun 2007

here i coded 4x4 mixer with loudness balancing like i said in prev post but in prev post it was wrong fomula... here u are the code streamin in1; streamin in2; streamin in3; streamin in4; streamin i1o1; streamin i2o1; streamin i3o1; streamin i4o1; streamin i1o2; streamin i2o2; streamin i3o2; streamin i4o2; streamin i1o3; streamin i2o3; streamin i3o3; streamin i4o3; streamin i1o4; streamin i2o4; streamin i3o4; streamin i4o4; streamout out1; streamout out2; streamout out3; streamout out4; out1 = (in1*i1o1+in2*i2o1+in3*i3o1+in4*i4o1)* (1-0.1875*i1o1-0.1875*i2o1-0.1875*i3o1-0.1875*i4o1); out2 = (in1*i1o2+in2*i2o2+in3*i3o2+in4*i4o2)* (1-0.1875*i1o2-0.1875*i2o2-0.1875*i3o2-0.1875*i4o2); out3 = (in1*i1o3+in2*i2o3+in3*i3o3+in4*i4o3)* (1-0.1875*i1o3-0.1875*i2o3-0.1875*i3o3-0.1875*i4o3); out4 = (in1*i1o4+in2*i2o4+in3*i3o4+in4*i4o4)* (1-0.1875*i1o4-0.1875*i2o4-0.1875*i3o4-0.1875*i4o4);

here u can see that multiplier is so outr*1-((1-(1/n))/n)*ixoy-.....*inor

oddson · 5 Jun 2007

Thanks... I haven't tried it yet but it looks like it is a coded version of what I've posted.

I think infuzion has it right that the opcodes that deal with inter-channel maths are needed before you could have a single quad input and keep it as one SSE process stream.

minione · 5 Jun 2007

yes but we can do exacly what we can )) yes its coded version of it but it also have some component that gives signal in [-1;1] anyway, because if look into your variant that will be [-4;4] if u turn all controls on max

infuzion · 9 Jun 2007

OK, I figured a way using existing ASM... it still would be long though.